Symmetric saw-tooth wave generator for frequency conversion systems



a z u l I vnvuu HLILDLHUL p 11, 1962 M. v. KALFAIAN 3,054,063

SYMMETRIC SAW-TOOTH WAVE GENERATOR FOR FREQUENCY CONVERSION SYSTEMSFiled Jan. 19, 1960 3 Sheets-Sheet 1 PULSEAHPUFER ONE SHOT BIAS on: SHOTINVENTOR.

OUTPUT WAVE'FORM ONE SI/OT Se t. 11, 1962 M. v. KALFAIAN 3,054,053

SYMMETRIC SAWTOQTH WAVE GENERATOR FOR FREQUENCY CONVERSION SYSTEMS FiledJan. 19, 1960 3 Sheets-Sheet 3 COINCIDENCE TUBE 2v v R70 28 w 1.12 1 50LENOID; ONE FOR E E??? i? 263271 l I P \-fi|r B? o.c A.C.0R r" --l"-' cAicnon mmsur DISCHARGE m2 2? 1.9 J AMPLIFIER N c? v ml 24 2/ 2* 1y a 0cums/v1 AMPUFIER r= e25 {Z s m n g FLIP-FLOP c261? 7 3 /23 AMPLITUDEEQUAL/2BR 22 SPEECH SOUND WAVES L 1 25 I FUNDAMENTAL FREQ. SEIECTOR l 2v INVENTOR.

United States Patent i 3,054,063 SYMMETRIC SAW-TOQTH WAVE GENERATOR FORFREQUENCY CONVERSION SYSTEMS Meguer V. Kalfaian, 962 Hyperion Ave., LosAngeles, Calif. Filed Jan. 19, 1960, Ser. No. 3,350 11 Claims. (Cl.328--185) This invention relates to a scanning system for shiftingvariably changing basic resonances in speech sound waves topredetermined reference frequency regions, for phonetic analysis of thespoken sound, and it is particularly an improvement over the systemsdisclosed in my US. Patents No. 2,705,260 March 29, 1955; No. 2,708,688May 17, 1955; No. 2,921,133 January 12, 1960, and patent applicationSerial No. 723,510 March 24, 1958, now Patent No. 2,921,133, January 12,1960. Its main object is to provide improved methods and means forstandardizing the frequency positions of the basic resonances of thepropagated speech sound waves, prior to analysis, for final translationinto visible intelligible indicia, for example, by electric typingdevices. A further object of the present invention is to provide a novelscanning system for said frequency-conversion of the propagated speechsound waves.

In order that a machine, or the like, may be devised to simulate theinterpretive mechanism of human intelligence, in printing spoken Words,as spoken by all qualities and ranges of voices, without environmentcontrol adjustments, or pre-adjustments to any particular voice, it isnecessary that all environmental variables are first standardized duringpropagation of the sound Waves, so that standard sets of parameters maybe derived to collectively define different phonetic sounds of thespoken Words. To accomplish such standardization, advantage is taken ofthe fact that all phonetic sounds are composed of definite sets ofresonances whose ratios in frequency positions with respect to afundamental remain contant, no matter what band of the voice spectrumthey are produced in; this theoretical concept is disclosed in my abovementioned patents and application. Accordingly, the object of thepresent invention is to select the varying fundamental frequenciesduring propagation of the sound waves, and shift all frequencycomponents to regions where their frequency ratios become constant withrespect to a pre-assigned fundamental frequency. The said sets ofparameters may then be derived, without variables, to collectivelydefine each phonetic sound of the spoken words in speech.

Frequency standardizing methods and systems had been disclosed in myabove mentioned Patent No. 2,708,- 688 and Serial No. 723,510. Thesystems utilized in both of these disclosures provide two storage tubesof the cathode ray type, in a manner that the wave pattern contained inone cycle portion of the selected fundamental (during propagation of thesound waves) is recorded in one storage tube, and the wave patterncontained in the following one cycle portion of the selected fundamentalis recorded in the other storage tube. While the first recording isprocessed, its time length (from inception to termination of the wavepattern) is measured and stored in the form of a first signal quantity.Then, while the second recording is processed, the first recorded wavepattern is reproduced under control of the first quantity, so adjustedthat the first recorded Wave pattern is reproduced in a predeterminedstandard time base period. The same process is repeated with the secondrecorded wave pattern, so that the end result is a cyclic reproductionof the wave pattern of the propagated sound wave at a standard time baseperiod. In order to allow time for reproduction of the recorded wavepatterns prior to Patented Sept. 11, 1962 the arrival of successive wavepatterns, the standard time base period is adjusted to be several timesshorter than the shortest time base period occurring in ordinary speechsound waves. Thus, the number of reproduced wave patterns will be manymore (randomly varying) than the actual recorded wave patterns, whichcondition is found to be more advantageous for more accurate resonanceanalysis of the wave patterns. Improved frequency conversion systems forthe above noted purpose have been described in my patent applicationsSerial No. 773,064 November 10, 1958, now Patent No. 2,942,198;

No. 781,103 December 17, 1958; and No. 857,121 December 3, 1959.

It has been described in my above mentioned Patent No. 2,705,260 andpatent application Serial No. 723,510 that a wave pattern contained inone cycle time period of a fundamental frequency will yield all theinformation necessary for recognizing the particular phonetic sound. Butsince it is difficult to select the different resonances from a singlewave pattern, the recorded wave pattern is reproduced a number of timesso as to be capable of energizing a set of pretuned resonant circuitstherefor. However, it is not necessary to render contiguity betweensucceedingly recorded wave patterns. In fact, such contiguity maysometimes cause ambiguity of resonance selection, as a succeeding wavepattern may change its shape from that of the preceding one. Thus, it ismore desirable to energize the frequency selecting resonant circuitsduring reproduction of a Wave pattern, and dissipate rapidly prior toselection of the resonances of a succeeding wave pattern. Also, therepeated reproduction of the recorded wave pattern does not have to becontinually in forward direction, and accordingly, a back and forwardsweeping scanning system may be utilized, with greater advantage ofavoiding any time lost during retrace period. Such time lost duringretrace period may randomly cause sudden phase reversal of thereproduced wave pattern, and prevent proper energization of saidpre-tuned resonant circuits by way of heavy filter action. Further yet,if the number of wave pattern reproduction is random, and less than theband pass of said pre-tuned resonant circuits, the amplitude built-up insaid resonant circuits, for each phonetic sound, may not be the same fordifferent pitched voices. It is therefore more desirable to standardizethe number of reproduction of a recorded wave pattern. Accordingly, itis the principle object of the present invention to provide a frequencyconversion scanning system for first recording a wave pattern of thespeech sound wave during propagation of same, and reproducing therecorded wave repeatedly in forward and backward sweeping directions ata predetermined reference time base period, including means for stoppingsaid reproduction after reaching a predetermined number of counts. Sucha system had been disclosed in my patent application Serial No. 857,121filed December 3, 1959, and the present invention is contemplated as animprovement over it, utilizing transistors in a specifically differentapparatus, instead of conventional vacuum tubes.

In order to distinguish between the presently proposed mode of scanningand the conventional mode of scanning having retrace time lag periods,consider for one example, that a complex waveform having equal signallevels at its beginning and ending is recorded along a single lineacross the screen of a cathode beam type storage tube. When thisrecorded wave is reproduced several times continuously by conventionalsaw tooth scanning waves having retrace time lag periods, contiguitybetween each reproduced waveform is broken by the retrace periods, whichmay deviate from the original accuracy with regard to frequencycomponents contained;

when critical narrow band pass circuits are involved. In a secondexample, assume that the signal levels commencing and terminating therecorded waveform are widely different. In this case, even if theretrace periods of the scanning waves were zero, there will occur suddenchanges in signal levels, which when oppositely poled, will cause highfiltering action through the associate narrow pass band circuits; thisfiltering action varying intermediately depending upon the differencesin signal levels at the beginning and ending of the recorded waveform.

The recorded complex waveform is herein referred to as representation ofsome sound in intelligence, for example, in speech sound waves. As suchrecording may be a portion of a repetitious sound wave, to be reproducedcontinuously at a later time period, for example, after beingtransmitted through a narrow band transmission channel, it does notmatter whether the recorded wave is scanned in forward direction or inbackward direction, or further yet, alternately in forward and backwarddirec-v tions. This condition is true, because intelligence of the soundis not transmitted through phase variations of the wave, but through itsvarious frequency components, which would not alter through the lattermode of scanning. Thus instead of utilizing reproduction scanning sawtooth waves having only forward direction, and including retrace timeperiods between repetitions, we may use symmetric forward and backwardsaw tooth waves, with complete elimination of the retrace periods. Bysuch mode of scanning, an associated band pass circuit would not see asudden change in signal level either at the beginning or at the endingof the recorded waveform, and therefore, avoid filtering action. Thislatter mode of scansion may not be considered as ideal, because the wavecurve at the beginning or ending of the recorded waveform may not betangential at all times, and the sharp reversal of signal at thesepoints may introduce some unwanted frequency components in the outputcircuit; but these components will be of small magnitudes in comparisonwith the effects introduced in conventional mode of scanning, andtherefore, they may be considered as negligible.

In the particular embodiment of the present invention, the time periodof a waveform to be recorded is not predicted beforehand, andaccordingly, the distance of recording, for example, across the screenof a storage type cathode ray tube, may vary widely for each recording.For this reason, and with reference to above given ex-: planation andthe advantages with respect to conventional modes of scanning, thepresent invention contemplates to first provide means for producing arecording saw tooth scanning wave rising from a reference point. .Duringthis recording scansion of the incoming waveform, a signal voltage isproportionally derived and stored, the quantity of which represents thetime dimension of the recording saw tooth wave; for further control.Further means is provided for reproducing symmetric scansion saw toothwaves, the amplitudes of which are controlled by said stored quantity,in a manner that, they scan the recorded wave beginning from the samereference point to the ending of the record; and backward alternately.

For further understanding of the objects and features of the presentinvention, reference will now be made to the following specification, inconjunction with the accompanying drawings, wherein: FIG. 1 is aschematic diagram in accordance with the invention; FIG. 2 is a graph ofwaveforms involved in describing the arrangement of FIG. 1; and FIG. 3is a supplemental addition to the arrangement of FIG. 1.

Referring now to the waveforms of FIG. 2, the scanning waveform at Aillustrates the mode of recording and reproducing a wave pattern of thespeech sound waves. The sweeping wave 1 represents the recording, orwrite, saw tooth voltage, rising from zero voltage level to a maximumvoltage level E After the wave pattern is written during write period,symmetric saw teeth voltages 2, 3, etc. are produced duringreproduction, or read period, at repetition of a reference frequencyrate. The fall 2 and rise 3 of these symmetric saw teeth voltages areproduced in equal amplitudes as of the saw tooth voltage of wave 1, andtheir maximums and minimums coincide exactly with that of zero and EAfter a predetermined number of read saw teeth voltages are produced,they are stopped during waiting period 4, until a new writing saw toothvoltage 5 is produced, the latter of which may have a difierentamplitude than the voltage of 1; the rate of rise of voltages 1 and 5,however, being always constant. After the writing scan voltage 5 isproduced, the read scan voltages 6 follow in the previously explainedmanner. Due to deviation from the ideal conditions, as desired, by theuse of certain electrical component parts in conjunction with thepresently disclosed electronic circuit arrangement, a slight delay isintroduced between the ending of write period and the beginning of e lperiod, as indicated in the graphical illustration at A. Such a delay,however, has no effect upon the operation of the system, and will notdeteriorate any analytical conditions during reading time.

With the brief explanation of the presently disclosed scanning system,by way of the graphical illustration at A, in FIG. 2, reference is nowmade to the schematic arrangement of FIG. 1, wherein the scanningvoltage waves at A are produced across capacitor C1. This capacitor isnormally connected in parallel with the parallel connected capacitors C2and C3, through normally closed contacts 7 and 8 of relay RYl. Theinductance L1 is assumed to have very low internal resistance, andaccordingly, its presence may be considered as a short circuit withrespect to the parallel connections of capacitors C2 and C3. Theparallel combination of capacitors C1, C2 and C3 is connected to thepositive terminal of battery B1 in series with timing resistor R1 andPNP transistor Q1. This transistor is utilized as an on-andoff switch,for example, during write period it is rendered conductive, so that thecapacitors C1, C2 and C3 charge with a rising positive voltage, at atime constant depending upon the series connected resistor R1.

During write period, there are three sets of capacitors charging at thesame time, which are: the parallel combination of capacitors C1, C2, C3;the parallel combina tion of capacitors C4, C5; and the parallelcombination of capacitors C6, C7. These parallel combinations containseries connected inductances L1, L2 and L3, the presence of which isconsidered as short circuit, and their purpose will be described later.The parallel combination of capacitors C4 and C5 is connected at oneterminal to ground in series with parallel connected NPN switchingtransistors Q2, Q3, and connected at the other terminal to the positiveterminal of battery B1, in series with timing resistor R2 and PNPswitching transistor Q4. Thus, when one of the transistors Q2 or Q3 isin conductive state, and simultaneously the transistor Q4 is inconductive state, the parallel combination of capacitors C4, C5 startscharging positively with rising potential at a time constant dependingupon the resistive value of R2. The parallel combination of capacitorsC6, C7 is connected at one terminal to ground in series with parallelconnected PNP switching transistors Q5, Q6, and at the other terminalconnected to the negative terminal of battery B2 in series with timingresistor R3 and NPN switching transistor Q7. Thus, when either one ofthe transistors Q5 or Q6 is rendered conductive simultaneously withconductance of the transistor Q7, the parallel combination of capacitorsC6 and C7 starts charging with rising negative potential at a timeconstant depending upon the resistive value of R3.

The base terminals of PNP transistors Q1 and Q4 are connected inparallel, and to a positive bias potential of battery B3 through inputload resistor R4, so that normally they are both rendered inoperative.The base terminal of NPN transistor Q2 is normally reverse biased tocurrent cut off, by receiving negative potential from the junctionterminal of resistors R5 and R6, which are connected across battery B4.Similarly, the base terminal of NPN transistor Q3 is normally reversebiased to current cut off, by receiving negative potential from thejunction terminal of resistors R7 and R8, which are connected acrossbattery B4. The base terminal of NPN transistor Q7 is normally reversebiased to current cut off, by connecting to the negative terminal ofbattery B5, through input load resistor R9. The base terminal of PNPtransistor Q5 is normally reverse biased to current cut off, byreceiving positive potential from the junction terminal of resistors Rand R11, which are connected across battery B6. Similarly, the baseterminal of PNP transistor Q6 is normally reverse biased to current cutoff, by receiving positive potential from the junction terminal ofresistors R12 and R13, which are connected across the battery B6.

Simultaneous conductive states of the transistors Q2 and Q4 isestablished by the driving NPN transistor Q8, which when in conductivestate, it draws emitter current through resistor R5 and collectorcurrent through R4. Thus there is produced forward biases across R4 andR5 for the on-operation of transistors Q2 and Q4. Simultaneousconductive states of the transistors Q5 and Q7 is established by thedriving PNP transistor Q9, which when in conductive state, it drawsemitter current through resistor R10 and collector current throughresistor R9. Thus there is produced forward biases across R10 and R9 forthe on-operation of transistors Q5 and Q7.

During write period the parallel combinations of capacitors C4, C5 andC6, C7 are charged in series with R2, Q2, Q4 and R3, Q5, Q7,respectively, by the conductive states of driver transistors Q8, and Q9,respec tively. During read period, however, all of said last transistorsare rendered inoperative, and transistors Q3, Q6 are renderedconductive. The operation of transistors Q3 and Q6 is established byconductance of the normally inoperative driver NPN and PNP transistorsQ10 and Q11, respectively. The on-and-ofi switching states of drivertransistors Q8 to Q11 are established by forward and backward biasesimpressed upon their base elements at proper time periods by the fourflip-flop circuits, indicated as FF-l to FF-4, respectively, theoperating conditions of which will be described further.

Referring now to the functional operation of the circuit in FIG. 1,assume that writing of an incoming sound wave pattern has started. Theparallel combination of capacitors C1, C2 and C3 start charging inpositive direction in series with timing resistor R1 and conductivetransistor Q1 to the positive potential of battery B1; the contact 7 and8 of relay RY1 being normally closed dur ing this period. The parallelcombination of capacitors C4 and C5 start charging in positive directionin series with timing resistor R2, and conductive transistors Q2, Q4 tothe positive potential of battery B1. The parallel combination ofcapacitors C6 and C7 start charging'in negative direction in series withthe timing resistor R3 and conductive transistors Q5, Q7 to the negativepotential of battery B2. The timing resistors R1 and R2 are so adjustedthat the potentials across said charging capacitors do not exceed about60% of the potentials of batteries B1 and B2 during the longest timeperiod that a wave pattern may be written; so as to retain linearity ofthe charging rate. When the writing wave pattern is ended, theconductive transistors Q1, Q2, Q4, Q5, Q7 are all simultaneouslyrendered inoperative, and further charging of said capacitors stops. Atthis point, the relay RY1 is energized, which pulls the armature 9downward, disengaging its contact 7 from normal contact 8, and makingcontact with 10. The contact 10 is connected to the emitter elements ofalternately switching transistors Q12 and Q13, which are alternatelyswitched on-and-ofi by the alternate current across secondary inductanceL4 in series with current limiting resistor R14. This alternate currentis induced from primary inductance L5, which receives its energy fromconstant frequency oscillator block 11. Due to NPN and PNPcharacteristics of transistors Q12 and Q13, respectively, the parallelimpressed currents to their base elements causes alternate on-and-offoperation, due to the fact that while one is forward biased the otherbecomes backward biased. It is desired that the alternate on-and-offoperations of Q12 and Q13 be in the form of a square form. This issubstantially possible by first arranging the oscillator 11 to produceclose to square waves, instead of sine waves. The output transformer isarranged with iron core with low impedance primary and driven at theprimary by low impedance source of the square wave oscillator 11,allowing to hold the current across the secondary substantially constantduring the square wave period. The base elements of Q12 and Q13 are thendriven extra hard, but Without damaging physically, due to the currentlimiting resistor R14. This further converts the switching conditions ofQ12 and Q13 to nearly square waveform. And finally, due to the very lowemitter to collector impedances of transistors, any transient impedancevariation will be considered negligible for the purpose involved herein.

Referring again to the closing of contacts 7 and 10 of relay RY1, thecapacitor C1 is now connected to the emitter elements of alternatelyswitching transistors Q12 and Q13. With a timing arrangement (thefunction of which will be described later, the PNP transistor Q6 isrendered conductive by the driving transistor Q11, at such time instantthat the alternate switching PNP transistor Q13 has initiated itsconductive state. By such act, the positively charged capacitor C1 hasnow an electrical path through Q13, timing resistor R15, negativelycharged combination of capacitors C6, C7, and transistor Q6, to ground.Due to the inherent low impedances of Q13 and Q6, the positive charge ofcapacitor C1 starts falling in the negative direction at a time speedmainly depending upon the timing resistor R15. The capacitive value ofparallel connected capacitors C6 and C7 is substantially higher than thevalue of C1, for example, at least 100 times or more, so that duringdischarge of C1 any loss of stored electrical quantity in capacitors C6and C7 will be negligible. The frequency of oscillator block isprefixed, and crystal control may be utilized if precision is required.The exact frequency of oscillation may be determined for a specific use,and for practical purposes required herein may be anywhere between 5 to10 kilocycles; producing 10 to 20 thousand switching operations persecond by transistors Q12 and Q13. Thus assuming that a frequency of 10kc. is chosen as a standard, the value of timing resistor R15, as wellas the voltage magnitude developed across capacitors C6 and C7, is soadjusted that the capacitor C1 discharges to zero value in exactly 90microseconds before reverse charging to the stored quantities of C6 andC7 starts. The principal purpose of the negative charge acrosscapacitors C6 and C7 is to provide linear discharge of capacitor C1 downto zero charge.

value, before curvature takes place. Thus, the higher potential acrosscapacitors C6 and C7, the greater linearity of discharge across C1; thevalue of R15 being adjusted accordingly, for the required timing of dis-Once these adjustments are fixed, it is seen that the switching PNPtransistor Q13 will always assume an ofiE-state at the instant thatcapacitor C1 has discharged to zero value, and the switching NPNtransistor Q12 will assume an on-state at the same instant.

The capacitor C1 now starts charging in positive direction to thepotential of charged capacitors C4 and C5, in series with Q12, Q3, andtiming resistor R16. In a similar mode, as described above, the chargedvoltage across capacitors C4 and C5 is preararnged to be greater thanthe charged voltage across capacitors C2 7 and C3, by pre-adjusting thevalue of resistor R2, and the potential of battery B1. Thus by furtheradjustment of timing resistor R16, the capacitor C1 charges with alinear rise across the charge of capacitors C4 and C5, until thepotential across C1 reaches the exact level as it had assumed when itwas connected in parallel with the capacitors C2 and C3. At thisinstant, the NPN transistor Q12 assumes an off-state and the PNPtransistor Q13 assumes an on-state so as to repeat forward and backwardcharge across capacitor C1, for the production of required read scanningwave, as indicated by the illustration at A. After a predeterminednumber of read scanning waves are produced, all transistors Q1 to Q11are rendered inoperative, and the capacitors C2, C3 and C4, C5 and C6,C7 are discharged to zero values, for a new start of scanning when afollowing sound wave pattern arrives upon the input of a particularmemory device employed. The transistors Q12 and Q13 may be leftoperating alternately at all times, as their presence will not disturbcharging conditions of the storage capacitors. For example, due to thehigh capacitive ratio between the capacitor C1 and the storagecapacitors, the timing resistors R16 and R15 are much larger than thetiming resistors R2 and R3, and any switching action of transistors Q12and Q13 during write period will be negligible in disturbing thecharging rates of capacitors C4, C5 and C6, C7.

The discharge of parallel connected capacitors C2, C3 and C4, C5 and C6,C7 are similar in nature, and they are discharged at the same time.Accordingly, description of the function of capacitors C2 and C3, as atypical example, will also refer to the functions of the othercapacitors. During discharge period, a pulse current is supplied to theprimary inductance L5 by the pulse amplifier block 12. This pulse isinduced across the secondary inductance L1, and the voltage developedacross it is made sufficiently high to overcome the highest voltagestored in capacitors C2 and C3. The inductance L1 is wound with lowresistance wire, which causes the original like poled voltages acrosscapacitors C2 and C3 to immediately change into unlike poled voltages,equal to the voltage developed across L1. When the pulse voltage acrossL1 subsides, the voltage across C2 and C3 drop at the same time, due tothe low resistance of L1. Thus the capacitors may be discharged withinan extremely short pulse period, without the necessity of conventionalelectric discharge devices being connected in parallel with thecapacitors; although such devices may be used, if so desired. The diodeD1 is used to prevent oscillation across L1, after the pulse voltage hasbeen completed. Thus the capacitors C4, C5 receive their dischargingvoltage induced from across primary inductance L6, and the capacitorsC6, C7 receive their discharging voltage induced from across primaryinductance L7; the diodes D2 and D3 being in parallel with the secondaryinductances L2 and L3, respectively. The inductances L1, L2 and L3 donot have to be center tapped, as their low inductances will not producesignal energy during charging period. If center tap is desired, and notavailable, however, the resistors R1, R2, R3 and R16 may be divided inparallel arrangement, and connected to the end terminals of saidinductances.

In reference to the capacitor C1, it was stated that Cl must be coupledto the charged capacitors C6 and C7 at the instant of conductance of thePNP switching transistor Q13; this coupling being establshed by theconductance of driver transistor Q11. Since Q11 is a PNP transistor, itsbase must be connected to a positive potential during off-state, and toa negative potential (causing forward base current) during on-state. Theemitter element of Q11 is connected to the junction terminal ofresistors R12 and R13, which normally offers reverse bias for currentcut off action. But the base of Q11 is connected to the positiveterminal of battery B6 in series with collector circuit resistor R17 ofNPN transistor Q16, which in operation draws suflicient current toeffect forward bias upon the base element of Q11. Thus the flip-flopcircuit FF-4 comprising NPN transistors Q16 and Q17 may be set and resetfor the onand-otf operation of Q11. Accordingly, a negative pulse isapplied upon the base element of Q17, from terminal (a), so thattransistor Q16 of FF-4 is set into conductive state for the coupling ofcapacitor C1 to the parallel connected capacitors C6 and C7. The propertiming of this negative pulse is obtained, as in the following:

At the instant that the writing period has ended, a pulse is applied,from terminal (0), to the inputs of one-shot circuit blocks 13 and 14.Various one-shot circuits are known and used both in commercial andspecialized electronic devices, and accordingly, detailed circuitry isavoided herein for simplicity of drawing. A one-shot circuit, however,is known to change its state of conduction in response to an incomingpulse signal; remain in such state for a predetermined time period; andreset itself automatically to the original conductive state. The timeperiod during which it stays in a changed state depends upon the valueof a capacitor contained therein, and it may be varied to any suitabletime delay period. Accordingly, a one-shot circuit may be used as adelay circuit, and due to the sharp rise and fall of the delayed outputsignal, either negative or positive pulses may be obtained bydifferentiation, for example, by coupling to associated circuits with asmall capacitor. Thus referring again to the input pulse from terminal(0), the one-shot circuit in black 14 changes its state of conductionand applies a prolonged signal to the relay driver block 15, which inturn energizes the relay coil RY1 and pulls the armature 9 downward toclose contacts 7 and 10. A relay with mechanical contact closure within200 microseconds is presently manufactured commercially. But even suchhigh speed of operation cannot match the speed of operation ofelectronic circuits, and accordingly, the block 13 of one-shot circuitis operated by the pulse arriving from terminal (c), as a compensationfor the mechanical delay. After a slight delay, the resetting conditionof oneshot circuit in block 13 produces a pulse by way of small couplingcapacitor C8, and operates the one-shot circuit in block 16. The outputof one-shot block 16 is directly applied upon the base element of NPNtransistor Q14 and load resistor R18, in series with current limitingresistor R19. Transistor Q14, however, being connected in series withtransistor Q15, cannot respond to the signal upon its base element untila simultaneous signal is applied upon the base element of Q15. As theprolonged signal from one-shot block 16 lingers upon the base of Q14, aproperly timed signal from oscillator block 11 finally arrives upon thebase element of Q15 and load resistor R20, by way of differentiatingcapacitor C9. Since transistor Q15 is of NPN characteristics, andtransistor Q13 is of PNP characteristics, the center tapped secondaryinductance L8 is oppositely terminated with respect to the inductanceL4, so that operations of Q13 and Q15 become simultaneous. Thus a pulsecurrent passes through gate transistors Q14 and Q15, in series withcollector circuit resistor R21, the current through which produces anegative pulse output terminals (a) and applies upon the base element ofQ17, at terminal (a), for the onoperation of Q16 of the flip-flopcircuit FF-4. During this pulse period (the pulse may be prolonged if sodesired), the NPN transistor Q10 must also be rendered conductive, byway of conduction of PNP transistor Q18 of flip-flop FF-2. Due to thePNP characteristics of tran sistor Q19, of FF-Z, a positive pulse mustbe applied to its base to render it inoperative. Accordingly, thenegative pulse from the collector element of Q14 is phase inverted inthe collector circuit resistor R22 of NPN transistor Q20, throughcoupling resistor R23, and applied from terminal (b) to the terminal (b)of the base element of transistor Q19, for the on-operation of NPNtransistor Q10.

With the above explained conditions of flip-flop circuits FF-2 and FF-4,the capacitor C1 becomes in a state of charging and discharging for theproduction of reading saw-tooth waves. After a number of readings, theflipfiops FF-2 and FF-4 reverse their states of operations, and thestorage capacitors are discharged, as explained in the foregoing. Thecapacitor C1, however, must be isolated from the rest of the circuits atthe instant that it had assumed zero potential, as no dischargingelement is provided for it; although a discharge element may also beeasily provided for it, if so desired. At the instant that one-shotcircuit in block 16 resets itself, an output pulse is produced throughthe difierentiator coupling capacitor C10, and applied upon the one-shotcircuit in block 17, so that it produces an output signal prolonged to aperiod of about one and one-half cycles of the oscillations inoscillator block 11; allowing enough time for a signal from inductanceL8 to arrive upon the gate circuit in block 18, through differentiatingcapacitor C11, in the form of a pulse. The circuitry of gate in block 18is similar to the circuitry of gate, comprising transistors Q14, Q15 andQ20, the operation of which had already been described. As stated, thecapacitor C1 is isolated from the charged capacitors at the instant thatit has assumed zero potential, during which time the switching NPNtransistor Q12 must assume conductance. Accordingly, the signaldelivered to the differentiating capacitors C9 and C11 are taken fromthe opposite terminals of center tapped inductance L8. The positive andnegative output pulses at terminals (e) and (h) of gate 18 are thenapplied to the input terminals (e) and (h) of flip-flops FF-Z and FF-3for their reversal to normal operating conditions. Simultaneously, apulse signal is applied to the pulse amplifier block 12, for dischargeaction of the parallel connected capacitors, as explained in theforegoing. The prolonged output signal of one-shot circuit in block 14is adjusted so that it ends approximately at the instant of capacitordischarging action starts, so that the relay RY1 releases armature 9from contact point and establishes normally closed contacts 7 and 8, fora new start of writing when a following sound wave pattern arrives atthe input of a particular memory device utilized.

The flip-flop circuits FF-1 to 1FF4 are of conventional design, andtheir functions have been described in various literature. Forreferences of component parts, however, the flip-flop FF-1 consist ofPNP transistors Q21, Q22; cross coupling resistors R24 to R29; emittercircuit resistor R30; and voltage dividing resistors R31, R32 from thejunction terminal of which is obtained a negative bias for the diodeinputs, by way of load resistors R33 and R34 to the diodes D4 and D5,respectively, so that the flip-flop will operate by input signals, asreceived through coupling capacitors C12 and C13, only when theirmagnitudes are higher than said bias. The capacitor C14 is utilized as abypass across emitter resistor R30. The flip-flop FF-2 consists of PNPtransistors Q18, Q19; cross coupling resistors R35 to R40; emittercircuit resistor R41 across which is included a bypass capacitor C17;and voltage dividing resistors R42 and R43 from the junction terminal ofwhich is obtained a negative bias for the diode inputs, by way of loadresistors R44 and R45 to the diodes D6 and D7, respectively, so that theflip-flop Will operate by input signals, as received through couplingcapacitors C and C16, only when their magnitudes are higher than saidbias. The flip-flop FF-3 consists of NPN transistors Q23, Q24; crosscoupling resistors R46 to R51; emitter circuit resistor R52 across whichis included a bypass capacitor C; and voltage dividing resistors R53 andR54 from the junction terminal of which is obtained a positive bias forthe diode inputs, by way of load resistors R55 and R56 to the diodes D8and D9, respectively, so that the flip-flop will operate by inputsignals, as received through coupling capacitors C18 and C19, only whentheir magnitudes are higher than said bias. The flip-flop FF-4 consistsof NPN transistors Q16 and Q17, cross coupling resistors R17 and R57 toR61; emitter circuit resistor R62 across which is included a bypasscapacitor C21; and voltage dividing resistors R63 and R64 from thejunction terminal of which is obtained a positive bias for the diodeinputs, by way of load resistors R65 and R66 to the diodes D10 and D11,respectively, so that the flip-flop will operate by input signals, asreceived through coupling capacitors C22 and C23, only when theirmagnitudes are higher than said bias.

The graphical illustration in FIG. 2 shows the time periods of variouson-and-off states of the switching transistors, as a guide in followingthe functional operation of the arrangements of FIG. 1. The pulse wavesand (g) shown in graphs I and J are obtained from the fundamentalfrequencies of the speech sound Waves, for a complete description ofwhich reference may be made to my Patent No. 2,872,517 February 3, 1959,wherein is included a schematic arrangement of a practical fundamentalfrequency selector from speech sound waves. A fundamental frequencyselector is also shown in block diagram 25.

FIG. 3 shows an arrangement that can be used in conjunction with thescanning system of FIG. 1. As described in the foregoing, the scanningsystem of FIG. 1 is particularly contemplated to be used forstandardization of the varying frequency components of speech soundwaves. In reference to the theoretical aspects of speech sound waves,each phonetic sound comprises a set of basic resonances. In ordinaryspeech, however, the frequency positions of these sets of basicresonances vary widely, although their frequency ratios remain constant,regardless of the band in which they are produced. In order tostandardize the frequency positions of these basic resonances, thefrequency conversion scanning wave, as produced by the arrangement inFIG. 1, had been contemplated herein. Accordingly, the scanning waveproduced across capacitor C1, at terminal (1') is first applied to anamplifier block 19, which current amplifies said waveform and appliesupon the beam deflection yoke 26 of a cathode ray memory tube 21. Thewriting wave is received from the block 22, which is the source of speedsound waves. The output of block 22 is first applied upon amplitudeequilizer block 23, the function of which is to expand and contract thewide amplitude variations of the originally propagated sound waves, sothat the peaks will always have a constant reference amplitude. Such anamplitude equalizer is described in my US. patent application Serial No.773,065 filed November 10, 1958. The output of block 23 is then appliedto the memory tube 21 for writing, in series with gate block 24. Thisgate admits the sound waves from block 23 during every other one cycletime periods of the fundamental frequencies of the speech sound waves.Accordingly, the speech sound waves from block 22 are applied to theblock 25, consisting of a fundamental frequency selector, which in turnproduces output pulses at the peaks of said fundamental frequencies.These pulses are applied to a block 26 consisting of a flip-flopcircuit, which in turn operates the gate 24 in alternate on-and-ofistates. The block 25 also supplies positive and negative output pulses(f) and (g) to the like terminals in FIG. 1. The operation timing ofgate 24 is such that, it is gated-on during writing time period, andgated-off during reading time period. Thus the output of memory tube 21contains the required frequency converted speech sound waves in periodicsequence. These waves are applied to an amplifier block 27, the outputof which is terminated to a plurality of sets of tuned circuits, eachset being tuned to fixed sets of resonances, as representation of aspecific phonetic sound. Only one set of tuned circuits is shown in thedrawings, which comprises secondary inductances L9,

L and L11, tuned to frequencies f f and f respectively. The oscillatoryvoltages across L9 to L11 are rectified by diodes D12 to D14,respectively, in series with variable resistors R67 to R69,respectively. The amplitude ratios of these rectified waves arepreadjusted in fixed positions across resistors R67 to R69, and bypassedby capacitors C24 to C26, respectively, so as to cancel out the highfrequency components across the tapped terminals of said resistors. Theoutput signals of these tapped terminals are then applied to the threeseparate control electrodes G1, G2 and G3 of a coincidence thyratrontube VI. When the three resonances at frequencies h to 3 are present,suggesting that a specific phonetic sound is present, and three separatevoltages are applied upon the control elements of VI simultaneously,raising the bias from B7 to zero volts, the thyratron tube V1 energizesand current flows through its anode circuit, energizing the solenoid L12in an electric typing device 28, for actuating a specific printing keytherein.

Coincidence devices are possible to make in the art of electronics, andthe particular device shown schematically in FIG. 3 represents an iondeflection thyratron, having three control electrodes of equalsensitivities, and is operated in a manner that, when the three controlelectrodes receive simultaneous signal voltages, raising their normalnegative bias of 4.5 volts to zero volts, the gas contained thereinionizes and fires, in similar mode as a thyratron. Such a tube ispresently labeled as KP-80, and manufactored =by Kip Electronics. Otherforms, of course, may eventually be made, for example, in semiconductorform, which will eliminate filament supply. The battery B8 may be in theform of A.C. supply, so that the tube V1 will automatically stopconduction after operating the solenoid L12; in series with currentlimiting resistor R70.

The descriptive matter in conjunction With the arrangements shown inFIG. 1 and F3, have shown a mode flexibility and broad possibilities.For example, the output of amplifier 27 may be heterodyned to lowpitched frequencies for narrow band transmission of the speech soundwaves. A second section as of the arrangement of FIG. 1 may be included,so that both are operated alternately, for contiguous scanning ofwriting and reading, instead of periodic scanning. Accordingly, thespecific arrangements shown herein are only exemplary, as variousmodifications, substitutions and adaptations are possible withoutdeparting from the true spirit and scope of the invention.

What I claim is:

1. In a frequency conversion system where a complex wave is recordedduring an unknown time period and reproduced repeatedly during constanttime base periods, and wherein phase variation of said complex waveduring reproduction time is allowable, the system of producing frequencyconversion scanning energy waves in symmetric forward and backwarddirections for the reproduction of said recorded complex wave,comprising first and second voltage sources of oppposite polarities froma common terminal point; first and second capacitors; a series connectedfirst circuit comprising a first capacitor, a first resistor, and afirst gate across said first voltage source, whereby charging the firstcapacitor in series with the first resistor when the first gate is inon-position; a series connected second circuit comprising a secondcapacitor, a second resistor, and a second gate across said firstvoltage source, whereby charging the second capacitor in series with thesecond resistor when the second gate is in on-position; a seriesconnected third circuit compris ing a third capacitor, a third resistor,and a third gate across said second voltage source, whereby charging thethird capacitor in series with the third resistor when the third gate isin on-position; means for rendering said first, second and third gatesin on-states from the beginning to end of said recording time period,thereby effecting charge of said first, second and third capacitors at aspeed determined by the predetermined values of said first, second andthird series-connected resistors; a fourth capacitor havingsubstantially smaller capacitive value than said first, second and thirdcapacitors; a multiconnecting switching means; means for connecting thefourth capacitor in parallel to said first capacitor by said switchingmeans during said recording time period, so as to acquire similarpotential charge; a fourth resistor from the charged terminal of saidsecond capacitor; a fifth resistor from the charged terminal of saidthird capacitor; fourth and fifth on-and-off gates connected in serieswith said fourth and fifth resistors from a common terminal point,respectively; means for rendering said first, second and third gates inofi-positions at the end of said recording time period, thereby saidfirst, second and third capacitors to retain their acquired charges insteady states Without disturbance; means for connecting said fourthcapacitor to the common terminal point of said fourth and fifth gates bysaid switching means after said first, second and third gates have beenrendered in off-states; a generator of alternate energy wave at aconstant predetermined frequency for the constant time base periodsaforesaid; means for applying said alternate wave to said fourth andfifth gates alternately for rendering same in on-and-ofi? statesalternately, said application being so timed as to render the fifth gatein on-state first, thereby allowing the fourth capacitor to dischargefirst in series with said fifth gate and fifth resistor and repeatthereon charging in series with the fourth resistor for continuousproduction of rising and falling potentials across the fourth capacitor;and means for utilizing the varying voltages across said fourthcapacitor as the frequency conversion forward and backward scanning waveaforesaid.

2. The system as set forth in claim 1, wherein is included a dischargingmeans for discharging any previously charged potentials in said first,second and third capacitors prior to the said charging.

3. The system as set forth in claim 1, wherein said first, second,third, fourth and fifth gates comprise transistors.

4. The system as set forth in claim '1, wherein said switching meansconsists of a high speed relay having double throw electrical contacts.

5. The system as set forth in claim 1, wherein the charging speed ofsaid second capacitor is adjusted faster than the speed of said firstcapacitor, so as to acquire a higher charging potential than the first;and the values of said fourth and fifth resistors are so adjusted thatsaid fourth capacitor charges to exact potential as it had acquiredduring said parallel connection with said first capacitor, at the exactmoment when said fourth gate is in ofi-state, and to zero value whensaid fifth gate is in ofi-state, thereby improving linearity of saidcharge and discharge.

6. In a frequency conversion system where a complex wave is recordedduring an unknown time period and reproduced repeatedly during constanttime base periods, and wherein phase variation of said complex waveduring reproduction time is allowable, the system of producing frequencyconversion scanning energy waves in symmetric forward and backwarddirections for the reproduction of said recorded complex waves,comprising first and second voltage sources of opposite polarities froma common terminal point; a first capacitor, a first resistor and a firston-and-off gate; means for series coupling last said parts across saidfirst voltage source, whereby charging the first capacitor in serieswith the first resistor when the first gate is in on-position; a secondcapacitor, a second resistor and a second on-and-off gate; means forseries coupling last said parts across said first voltage source,whereby charging the second capacitor in series with the second resistorwhen the second gate is in on-positions; a third capacitor, a thirdresistor and a third on-and-oif gate; means for series coupling lastsaid parts across said second voltage source, whereby charging the thirdcapacitor in series with the third resistor when the third gate is inonposition; fourth and fifth gates, and means for electricallyconnecting same in parallel with said second and third gates,respectively, whereby providing electrical path for said second andthird capacitors through either one of said parallel connected gates;means for rendering said fourth and fifth gates in off-states, and saidfirst, second and third gates in on-states from the beginning to end ofsaid recording time period, thereby effecting charge of said first,second and third capacitors at a speed determined by the predeterminedvalues of said first, second and third seriesconnected resistors; afourth capacitor having substantially smaller capacitive value that saidfirst, second and third capacitors; a multiconnecting switching means;means for connecting the fourth capacitor in parallel to said firstcapacitor by said switching means during said recording time period, soas to acquire similar potential charge; -a fourth resistor from thecharged terminal of said second capacitor; a fifth resistor from thecharged terminal of said third capacitor; sixth and seventh onand-otfgates connected in series with said fourth and fifth resistors from acomon terminal point, respectively; means for rendering said first,second and third gates in off-states at the end of said recording timeperiod, thereby said first, second and third capacitors to retain theiracquired charges in steady states without disturbance; means forelectrically connecting said fourth capacitor to the common terminalpoint of said sixth and seventh gates by said switching means after saidfirst, second and third gates have been rendered in off-states; agenerator of alternate energy wave at a constant predetermined frequencyfor the constant time base periods aforesaid; means for applying saidalternate wave to said sixth and seventh gates alternately for renderingsame in on-andoff states alternately; and means for rendering saidfourth and fifth gates in on-states at the instant said seventh gate isrendered in on-state by said alternate wave, so that said fourthcapacitor first begins discharging its acquired charge in the directionof said second voltage source, and repeat thereon charging anddischarging at the frequency of said alternate wave, whereby the energywaveform across said fourth capacitor may be represented as thefrequency conversion symmetric forward and backward scanning waveaforesaid.

7. The system as set forth in claim 6, wherein said fourth and fifthgates are rendered in on-states at time instants as in the following: aneighth on-and-off gate having first and second input terminals, saidgate being rendered in on-state only when excited at its first andsecond terminals simultaneously; means for producing first electricalpulses at the instants when said seventh gate is rendered in on-states;means for producing a second electrical pulse at the end of saidrecording time period, the second pulse having a time duration withinwhich at least one on-state of said seventh gate may occur; means forapplying said first and second pulses to said first and second inputterminals, thereby rendering the eighth gate in on-state; means forderiving an electrical signal from the on-state condition of said eighthgate; and means for rendering said fourth and fifth gates in on-statesat time instants when said signals are derived.

-8. The system as set forth in claim 6, wherein is included adischarging means for discharging any previously charged potentials insaid first, second and third capactors prior to the said charging.

9. The system as set forth in claim 6, wherein all of said gatescomprise transistors.

=10. The system as set forth in claim 6, wherein said switching meansconsists of a high speed relay having double throw electrical contacts.

11. The system as set forth in claim 6, wherein the charging speed ofsaid second capacitor is adjusted faster than the speed of said firstcapacitor, so as to acquire a higher charging potential than the first;and the values of said fourth and fifth resistors are so adjusted thatsaid fourth capacitor charges to exact potential as it had acquiredduring said parallel connection with said first capacitor, at the exactmoment when said gate is in off-state, and to zero value when said fifthgate is in off-state, thereby effecting charge of said fourth capacitorsubstantially linearly in series with said fourth and fifth resistors.

References Cited in the file of this patent UNITED STATES PATENTS2,942,198 Kalfaian June 21, 1960

